| Specifications to Tape Out
Deep expertise in Processors, High Speed interconnects, High Speed interfaces, Memory sub-systems and System Software powered with execution excellence in Front-End Design and Physical Design Implementation, positions Aaroh Labs to be your preferred partner to realize your SoC/ASIC
| Netlist to Tape Out
Experience in advanced technology nodes - 16nm, 28nm, 40nm with Expertise in High Speed Interfaces, Analog and Mixed Signal IP integration, High Performance Cores, Advanced Low Power Implementation Techniques enables first pass silicon implementation for your designs
Design Implementation
- Synthesis
- Design for Test
- Floor Plan
- Place and Route
- Clock Tree Synthesis
- Static Timing Analysis
- Timing Closure
- Physical Verification
- Multi-Power Domain
- Tape Out
Post-Silicon Validation
- Test Program Development
- ‘Contact-Test’ Boundary Scan Patterns
- Memory BIST Patterns
- Scan Patterns
- Reliability Tests Support (IDDQ, HTOL, BHAST)
| System Solutions
Expertise in end to end embedded solution from Booting to System Testing to Performance Optimization and Experience in Board Design to Product Prototype enables fast path for your product realization.
- Embedded Solutions
- Bootloaders and Firmware Development
- Evaluation Boards / Prototype Boards
- OS Porting / Board Bring Up
- Power Optimization
- Application Development and Porting
- Various Tool Chains and IDE
- Functional Testing
- System Testing
- Performance Optimization
- Board Design (3rd Party support)